Research on Computational Nanotechnology
Department of Computer Science
Brown University

John E. Savage

Motivation

As the feature sizes of chips shrink to the nanometer level new devices, methods of assembly, and architectures are being investigated. The crossbar, an old idea, is expected to play a prominent role in these new developments; its regular structure is well suited to nanotechnology-based assembly. A nanometer-scale crossbar is useful only if wires in each of its dimensions can be addressed individually. Given the small dimensions involved, every method proposed to address nanowires involves stochastic assembly. Our research examines methods of stochastic addressing of nanowires as well as the efficient data storage in crossbar-based memories.

Publications†

Stochastic Assembly of Sublithographic Nanoscale Interfaces 1, André DeHon, Patrick Lincoln, John E. Savage IEEE Transactions in Nanotechnology, September 2003.

Sub-lithographic Semiconductor Computing Systems, André DeHon describing work with Charles M. Lieber, Patrick Lincoln, and John E. Savage, HotChips 15 (HotChips-15, August 17--19, 2003).

Decoding of Stochastically Assembled Nanoarrays1, Benjamin Gojman, Eric Rachlin, and John E. Savage, Proceedings of the IEEE 2004 Int. Symp. on VLSI, pp. 11-18, February 19-20, 2004.

Analysis of a Mask-Based Decoder1, Eric Rachlin, John E. Savage, and Benjamin Gojman, Proceedings of the IEEE Computer Society Annl. Symp. on VLSI, A. Smailagic and N. Ranganathan (Eds.), May 11-12, 2005, pp. 6-13.

Efficient Data Storage in Large Nanoarrays, Lee-Ad Gottlieb, John E. Savage, and Arkady Yerukhimovich, Theory of Computing Systems, Vol. 38, pp. 503-536, 2005.

Evaluation of Design Strategies for Stochastically Assembled Nanoarray Memories2, Benjamin Gojman, Eric Rachlin, and John E. Savage, ACM J. on Emerging Technologies in Computing Systems, Vol. 1, No. 2, pp. 73-108, July 2005.

Nanowire Addressing in the Face of Uncertainty1, Eric Rachlin and John E. Savage, Proceedings of the IEEE 2006 Int. Symp. on VLSI, March 2-3, 2006.

Radial Addressing of Nanowires2, John E. Savage, Eric Rachlin, André DeHon, Charles M. Lieber, and Yue Wu, October 6, 2005, ACM J. on Emerging Technologies in Computing Systems, Vol. 2, No. 2, pp.129-154, April, 2006.

Nanowire Addressing with Randomized-Contact Decoders1, Eric Rachlin, John E. Savage, Procs. IEEE/ACM Int. Conf. on Computer-Aided Design (ICCAD), pp. 735-742, 2006.

Analysis of Mask-Based Nanowire Decoders 1, Eric Rachlin, John E. Savage, IEEE Transactions on Computers, Vol. 57, No. 2, pp. 175-187, 2008.

Modeling and Analysis of a Membrane-Based Randomized-Contact Decoder, Jennifer Long, John E. Savage, Procs. NSTI-Nanotech 2008, Vol. 3, pp. 80-83, June 1-5, 2008.


Nanowire-based crossbar

A Framework for Coded Computation 1, Eric Rachlin, John E. Savage, Procs. IEEE International Symposium on Information Theory, pp. 2342-2346, July 6-11, 2008.

Nanowire Addressing with Randomized-Contact Decoders , Eric Rachlin, John E. Savage, Theoretical Computer Science, Vol. 408, Issues 2-3, pp. 241-261, October, 2008. y

Stochastic Nanoscale Addressing for Logic, Eric Rachlin and John E. Savage, Procs. NANOARCH 2010, June 2010 (Anaheim, CA).

Patents and Applications

Stochastic Assembly of Sublithographic Nanoscale Interfaces, (A. DeHon, C.M. Lieber, P. Lincoln, and J.E. Savage), Pat. US 6,900,479 B2, May 31, 2005

Nanoscale Wire Coding for Stochastic Assembly, (A. DeHon, C.M. Lieber, P. Lincoln, and J.E. Savage), Pat. US 6,963,077 B2, November 8, 2005

Apparatus, Method and Computer Program Product Providing Radial Addressing of Nanowires, (J.E. Savage, E. Rachlin, A. DeHon, C.M. Lieber), Pat. US 8,072,005, Issued December 6, 2011

Method Providing Radial Addressing of Nanowires (J.E. Savage, E. Rachlin, A. DeHon, C.M. Lieber), Pat. US 8,883,568, Issued November 11, 2014

Apparatus, Method and Computer Program Product Providing Radial Addressing of Nanowires (J.E. Savage, E. Rachlin, A. DeHon, C.M. Lieber), Pat. US 9,252214, Issued February 2, 2016

† This research was supported in part by NSF NIRT Grant CCR-0210225 and NSF NER Grant CCF-0403674.
1 Copyright © 2003-2008 IEEE.
2 Copyright © 2005/2006 by the Association for Computing Machinery, Inc. Permission to make digital or hard copies of part or all of this work for personal or classroom use is granted without fee provided that copies are not made or distributed for profit or commercial advantage and that new copies bear this notice and the full citation on the first page. Copyrights for components of this work owned by others than ACM must be honored. Abstracting with credit is permitted. To copy otherwise, to republish, to post on servers, or to redistribute to lists, requires prior specific permission and/or a fee. Request permissions from Publications Dept, ACM Inc., fax +1 (212) 869-0481, or (permissions@acm.org).
Personal use of this material is permitted. However, permission to reprint/republish this material for advertising or promotional purposes or for creating new collective works for resale or redistribution to servers or lists, or to reuse any copyrighted component of this work in other works, must be obtained from the IEEE.

John Savage
Last modified: Fri Sep 10 13:29:39 EDT 2010